Image AlgorithmsTool Introduction
HDR Exposure Fusion implements the Mertens algorithm concept: simulate ±2EV bracketed exposures from a single image, compute per-pixel weights from well-exposedness (Gaussian bell curve), contrast, and saturation measures, normalize weights across all frames, then blend into a detail-rich LDR output. No camera response function estimation needed — results are immediately visible.
Key Formula / Principle
W_pixel = well_exposedness^cw × contrast^sw × saturation^ew well_exposedness = exp(-(lum-0.5)^2 / (2×sigma^2)) out = sum(W_k × pixel_k) / sum(W_k)
Data Processed Locally|All computations run in your browser. Images, formulas, state machine definitions, and any other input data are never sent to any server.
Related Tools
Color Matrix· Image AlgorithmsDemosaic· Image AlgorithmsAuto White Balance· Image AlgorithmsGamma Correction· Image AlgorithmsSpatial Denoise· Image AlgorithmsTemporal Noise Reduction (TNR)· Image AlgorithmsSharpen USM· Image AlgorithmsPixel Binning· Image AlgorithmsPipeline· Image AlgorithmsColor Space Converter· Image AlgorithmsHistogram Analysis· Image Algorithms3D LUT Color Grading· Image AlgorithmsTone Mapping HDR· Image AlgorithmsTone Curve· Image AlgorithmsCLAHE Auto Contrast· Image AlgorithmsBlack Level Correction· Image AlgorithmsDefect Pixel Correction· Image AlgorithmsLens Shading Correction· Image AlgorithmsCanny Edge Detection· Image AlgorithmsSobel Edge Detection· Image AlgorithmsLaplacian Edge Detection· Image AlgorithmsPrewitt / Roberts Edge Detection· Image AlgorithmsHarris Corner Detection· Image AlgorithmsHough Line Detection· Image AlgorithmsMean Blur· Image AlgorithmsMedian Filter· Image AlgorithmsNoise Injection· Image AlgorithmsErosion· Image AlgorithmsDilation· Image AlgorithmsOpening· Image AlgorithmsClosing· Image AlgorithmsCrop· Image AlgorithmsResize· Image AlgorithmsResistor Calculator· Basic ToolsOhm's Law· Basic ToolsRC/LC Filter· Basic ToolsNumber / Encoding Converter· Basic ToolsCRC Calculator· Basic ToolsState Machine Editor· FPGA ToolsTiming Diagram Tool· FPGA ToolsFIFO Depth Calculator· FPGA ToolsCDC Synchronizer Selector· FPGA ToolsSDC Constraint Generator· FPGA ToolsSetup/Hold Checker· FPGA ToolsTiming Budget Analyzer· FPGA ToolsPipeline Calculator· FPGA ToolsAI-Verilog Prompt Workbench· FPGA ToolsVerilog Code Template Library· FPGA ToolsBOM Manager· BOM Management